US focuses on invigorating chiplets to stay ahead of the

US focuses on invigorating ‘chiplets’ to stay ahead of the curve in tech

For more than 50 years, computer chip designers used one main tactic to increase performance: They shrunk electronic components to squeeze more power into each piece of silicon.

Then, more than a decade ago, engineers at chipmaker Advanced Micro Devices started toying with a radical idea. Instead of designing a large microprocessor with a large number of tiny transistors, they wanted to create a microprocessor from smaller chips packed tightly together and functioning like an electronic brain.

Sometimes called chiplets, the concept caught on, and AMD, Apple, Amazon, Tesla, IBM, and Intel introduced such products. Chiplets quickly gained traction because smaller chips are cheaper to manufacture, while bundled chips can outperform any single silicon wafer.

The strategy based on advanced packaging technology has since become an essential tool for semiconductor progress. And it represents one of the biggest shifts in years for an industry driving innovation in areas like artificial intelligence, self-driving cars, and military hardware.

“Packaging will be critical,” said Subramanian Iyer, a professor of electrical and computer engineering at the University of California, Los Angeles, who pioneered the chiplet concept. “It happens because there really is no other way.”

The catch is that such packaging, like the manufacture of chips themselves, is overwhelmingly dominated by companies in Asia. Although the United States accounts for about 12 percent of global semiconductor production, American companies supply only 3 percent of chip packaging, according to IPC, a trade association.

This issue has now put chiplets at the center of US industrial policy. The CHIPS Act, a $52 billion subsidy package passed last summer, was seen as President Biden’s move to revitalize domestic chip manufacturing by providing funds to build more sophisticated factories, known as “fabs.” But part of it was aimed at boosting advanced packaging factories across the United States to capture more of this important process.

“As the chips get smaller, the way you arrange the chips, that is, the packaging, becomes more important, and that’s what we need in America,” Secretary of Commerce Gina Raimondo said in a speech at Georgetown University in February.

The Department of Commerce is now accepting applications for manufacturing grants under the CHIPS Act, including for chip packaging factories. In addition, funding will be made available for a research program specifically for advanced packaging.

Some chip packaging companies are quick to seek funding. One is Integra Technologies in Wichita, Kansas, which announced plans for a $1.8 billion expansion conditional on receiving federal grants. Amkor Technology, an Arizona packaging service provider that has most of its operations in Asia, also said it is in talks with customers and government officials about a manufacturing presence in the United States.

Packing chips together isn’t a new concept, and chiplets are just the latest iteration of that idea. They take advantage of technological advances that are helping to pack the chips closer together — either side-by-side or stacked on top of each other — while allowing for faster electrical connections between them.

“The unique thing about chiplets is the way they are electrically connected,” said Richard Otte, general manager of Promex Industries, a chip packaging service provider in Santa Clara, California.

Without a way to connect them to other components, chips can’t do anything, which means they have to be housed in some kind of package that can carry electrical signals. This process begins after fabs complete the first phase of manufacturing, which may create hundreds of chips on a silicon wafer. Once this wafer is sliced ​​apart, the individual chips are usually bonded to an important base layer called a substrate, which can conduct electrical signals.

This combination is then covered in protective plastic, forming a package that can be plugged into a circuit board, which is essential for connecting to other components in a system.

These processes originally required a lot of manual labor, which prompted Silicon Valley companies to move packaging to low-cost countries in Asia more than 50 years ago. Most chips are typically flown to packaging services in countries such as Taiwan, Malaysia, South Korea and China.

Since then, advances in packaging technology have gained prominence as Moore’s Law, the shorthand term for chip miniaturization that has fueled progress in Silicon Valley for decades, has receded. It is named after Gordon Moore, a co-founder of Intel, whose 1965 paper described how quickly companies had doubled the number of transistors on a typical chip, resulting in improved performance at a lower cost.

But these days, smaller transistors aren’t necessarily cheaper, in part because high-end chip factories can cost $10 billion to $20 billion to build. Large, complex chips are also costly to develop and tend to have more manufacturing defects, even as companies in areas like generative AI want more transistors than can currently be fitted on the largest chip-making machines.

“The natural response to this is to pack more things into one package,” said Anirudh Devgan, general manager of Cadence Design Systems, whose software is used to design both conventional chips and chiplet-style products.

Synopsys, a competitor, said it has more than 140 customer projects based on packaging multiple chips together. According to market research firm Yole Group, up to 80 percent of microprocessors will use chiplet designs by 2027.

Today companies typically design all chiplets in one package along with their own interconnect technology. But industry groups are working on technical standards to make it easier for companies to assemble products from chiplets from different manufacturers.

The new technology is now mainly used for extreme performance. Intel recently unveiled a 47-chiplet processor called the Ponte Vecchio for use in a powerful supercomputer at Argonne National Laboratory near Chicago.

In January, AMD announced plans for an unusual product, the MI300, which combines chiplets for standard computing with others for computer graphics and a large pool of memory chips. This processor, designed to power another advanced supercomputer at Lawrence Livermore National Laboratory, has 146 billion transistors, compared to tens of billions in the most advanced conventional chips.

Sam Naffziger, AMD’s senior vice president, said it was not a bull’s eye for the company to base its server computer chip business on chiplets. The complexity of the packaging was a major hurdle, he said, which was eventually overcome with the help of an unnamed partner.

But chiplets have paid off for AMD. According to Mercury Research, the company has sold more than 12 million chips based on this idea since 2017 and has become a major player in microprocessors that power the Internet.

Packaging services still need others to supply the substrates that chiplets need to connect to circuit boards and to each other. One company driving the chiplet boom is Taiwan Semiconductor Manufacturing Company, which already makes chips for AMD and hundreds of others, and offers an advanced silicon-based substrate called the Interposer.

Intel has developed similar technology and also improved lower-cost traditional plastic substrates, such as Silicon Valley startup Eliyan. Intel has also developed new packaging prototypes as part of a Pentagon program and hopes to enlist CHIPs Act support for a new pilot packaging facility.

However, in the United States there are no major manufacturers of these substrates, which are mainly manufactured in Asia and emerged from PCB manufacturing technologies. Many US companies have also pulled out of the business, another concern industry groups hope will spur federal funding to help circuit board suppliers manufacture substrates.

In March, Mr. Biden noted that advanced packaging and domestic circuit board production were critical to national security and announced $50 million in Defense Production Act funding for American and Canadian companies in these areas.

Even with such subsidies, putting together all the elements needed to reduce US reliance on Asian companies is “a major challenge,” said Andreas Olofsson, who led Defense Department research in the area before calling a packaging startup Zero ASIC founded. “They have no suppliers. You have no workforce. You have no equipment. You kind of have to start from scratch.”

Ana Swanson contributed coverage.